Raspberry Pi Becomes a Member of the RISC-V Foundation

Alasdair Allan
4 min readJan 4, 2019

Earlier today we had a bit of a surprise with the news that Raspberry Pi has joined the RISC-V Foundation as a member.

The RISC-V Foundation has a tiered membership structure, with the Silver membership level giving the participating organisation one vote per open position on the Foundation’s board, and allowing them to participate in the Foundation task groups and contribute to the upkeep of the RISC-V ISA.

The SiFive Freedom Everywhere 310 (FE310) RISC-V SoC. (📷: SiFive)

The Silver membership level is the lowest of the ‘corporate’ membership levels offered by the RISC-V Foundation, and carries yearly membership dues of $5,000. Members at this level are not eligible to chair technical committees, or task groups, or stand as candidates for the Foundation’s governing board.

If the Raspberry Pi Foundation was seriously considering a near term shift away from Arm to RISC-V I’d expect them to buy into the platform at a level which lent them a bit more control of things. Which probably means that today’s announcement is speculative, or tactical, rather than strategic.

So, despite the rampant speculation that this move is going to lead to, I rather think that we aren’t looking at a RISC-V-based Raspberry Pi. At least not yet..?

However we recently saw the release of the “final iteration” of the classic Raspberry Pi platform, with the release of the Raspberry Pi 3 Model B+ in March last year, followed by the release of the Model A+ in November.

“…the 3+ platform is the final iteration of the ‘classic’ Raspberry Pi: whatever we do next will of necessity be less of an evolution, because it will need new core silicon, on a new process node, with new memory technology. So 3A+ is about closing things out in style.”

Which means that whatever comes next isn’t going to look like the Raspberry Pis we’ve come to know. Until now, every Raspberry Pi has shared hardware compatibility with the original Raspberry Pi released back in 2012, and that’s going to change.

The Raspberry Pi 3 Model B+. (📷: The Raspberry Pi Foundation)

There’s been idle speculation about what a RISC-V-based Raspberry Pi might look like for several years. But the last year has seen RISC-V take off in a more serious way with the arrival of the SiFive Freedom U500, a 64-bit Linux-capable chip, running at 1.5GHz. However with the HiFive Unleashed, the first board based around the new chip, costing just under $1,000 we’re hardly in Raspberry Pi territory just yet. Especially as the performance is quite slow compared to similar Arm-based processors.

There’s also the long association between Raspberry Pi and Broadcom to consider, and the current lack of good GPU options for the RISC-V platform. The idea that the next Raspberry Pi would have worse graphics performance than the current model isn’t realistic.

No doubt we’ll hear more about the announcement directly from Raspberry Pi given time, but despite what you might read elsewhere I don’t think we’re looking at a RISC-V-based Raspberry Pi. But I wouldn’t rule it out entirely.

Like the long anticipated move by Apple to switch their MacBook line from x86 Intel chips to a lower-powered, and more battery friendly, Arm-based replacement, a RISC-V-based Raspberry Pi isn’t a totally crazy idea. Indeed, in the long run, it might even be an obvious one?

Update: Eben Upton commented that, “…this isn’t a product announcement. There’s a lot of exciting work going on in the RISC-V community at the moment. We believe that instruction-set diversity is important, and that open, free instruction set architectures are an important enabler for innovation. Our impression is that the hardware side of things is going pretty well. We think we can contribute on the software side, which is important if RISC-V is going to become a viable alternative for desktop general-purpose computing. By ‘software,’ we mean some subset of toolchain, kernel, user land, SIMD fast paths, JITs. We will be soliciting proposals for small projects in these areas.”