The sixth RISC-V workshop was held in Shanghai last month, and a lot of interesting discussions took place around bringing the RISC-V architecture to market. However, at least for me, Bunnie Huang’s keynote on the relationship between Open Hardware and Open Silicon was the highlight. Not least because Bunnie kicked off his talk with some interesting ideas around Moore’s Law.
Bunnie argued that while Moore’s Law held if you started developing a project at the point when a vendor released their silicon it would be obsolescent even before you managed to ship it. However, now that Moore’s Law is slowing down, it’s possible to have some time to think and build with current technology before you have to think about the next generation. In effect, Bunnie is arguing that the death of Moore’s Law is what is making Open Hardware possible in the first place.
I’ve had similar thoughts myself—while we might no longer be expecting computing to become orders of magnitude faster, or smaller, we may well have reached the point where our computing is “good enough.” That, at least as far as computing is concerned, we’re looking at a maturing technological base. Yet perversely, that means some things are starting to happen more quickly.
The RISC-V open-source architecture has been around since 2010. But with the arrival last year of the Freedom Everywhere 310 — the first commercially available SoC based on RISC-V architecture—and last month’s announcement from SiFive that their Coreplex IP architecture was available for licensing things are starting to move fast for the long ignored architecture.
In fact with the first GAP8 processor samples by Open-Silicon shipping soon we’re almost in a place where we have multiple vendors producing open silicon based around the RISC-V core, and when that happens we’ll be in a very different place than we were before. Thanks, perhaps, to the death of Moore’s Law.